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STQ1NC60R
N-CHANNEL 600V - 12 - 0.3A TO-92 PowerMESHTMII Power MOSFET
TYPE STQ1NC60R
s s s s s
VDSS 600 V
RDS(on) < 15
ID 0.3 A
TYPICAL RDS(on) = 12 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED TO-92 BULK TO-92 (AMMOPACK)
DESCRIPTION Using the latest high voltage MESH OVERLAYTMII process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company's proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS LOW SWITCH MODE POWER SUPPLIES (SMPS) s BATTERY CHARGER
s
ORDERING INFORMATION
SALES TYPE STQ1NC60R STQ1NC60R-AP MARKING Q1NC60R Q1NC60R PACKAGE TO-92 TO-92 PACKAGING BULK AMMOPACK
July 2003
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ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM ( ) PTOT dv/dt (1) Tj Tstg Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Operating Junction Temperature Storage Temperature Value 600 600 30 0.3 0.19 1.2 3.1 0.025 3 -65 to 150 -65 to 150 Unit V V V A A A W W/C V/ns C C
( ) Pulse width limited by safe operating area (1) ISD 0.3A, di/dt 100A/s, VDD V(BR)DSS, Tj TJMAX.
THERMAL DATA
TO-92 Rthj-amb Rthj-lead Tl Thermal Resistance Junction-ambient Max Thermal Resistance Junction-lead Max Maximum Lead Temperature For Soldering Purpose 120 40 260 C/W C/W C
AVALANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V) Max Value 0.3 60 Unit A mJ
ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED) ON/OFF
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 30V VDS = VGS, ID = 250A VGS = 10V, ID = 0.3 A 2 3 12 Min. 600 1 50 100 4 15 Typ. Max. Unit V A A nA V
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ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED) DYNAMIC
Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = 15 V, ID = 0.3 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 0.87 108 18 2.5 Max. Unit S pF pF pF
SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Test Conditions VDD = 300 V, ID = 0.5 A RG = 4.7 VGS = 10 V (Resistive Load see, Figure 3) VDD = 480V, ID = 1 A, VGS = 10V, RG = 4.7 Min. Typ. 7.2 8 7.3 3.4 2.5 10 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol tr(Voff) tf tc Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 480V, ID = 1 A, RG = 4.7, VGS = 10V (Inductive Load see, Figure 5) Min. Typ. 33 11 43 Max. Unit ns ns ns
SOURCE DRAIN DIODE
Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 0.3 A, VGS = 0 ISD = 1 A, di/dt = 100A/s VDD = 25 V, Tj = 150C (see test circuit, Figure 5) 450 720 3.2 Test Conditions Min. Typ. Max. 0.3 1.2 1.6 Unit A A V ns C A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedance
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Output Characteristics . Transfer Characteristics
Tranconductance
Static Drain-Source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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TO-92 MECHANICAL DATA
mm. DIM. MIN. A b D E e e1 L R S1 W V 4.32 0.36 4.45 3.30 2.41 1.14 12.70 2.16 0.92 0.41 5 TYP MAX. 4.95 0.51 4.95 3.94 2.67 1.40 15.49 2.41 1.52 0.56 MIN. 0.170 0.014 0.175 0.130 0.094 0.044 0.50 0.085 0.036 0.016 5 TYP. MAX. 0.194 0.020 0.194 0.155 0.105 0.055 0.610 0.094 0.060 0.022 inch
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TO-92 AMMOPACK
mm. MIN. TYP MAX. 4.8 3.8 1.6 2.3 0.48 12.5 5.65 2.44 -2 17.5 5.7 8.5 18.5 15.5 3.8 16 4 18 6 9 12.7 6.35 2.54 12.9 7.05 2.94 2 19 6.3 9.25 0.5 20.5 16.5 25 4.2 0.9 11 3 -1 1 0.11 -0.04 0.04 0.15 0.157 0.72 0.61 0.63 0.49 0.22 0.09 -0.08 0.69 0.22 0.33 0.71 0.23 0.35 0.5 0.25 0.1 MIN. inch TYP. MAX. 0.19 0.15 0.06 0.09 0.02 0.51 0.27 0.11 0.08 0.74 0.24 0.36 0.02 0.80 0.65 0.98 0.16 0.035 0.43
DIM. A1 T T1 T2 d P0 P2 F1, F2 delta H W W0 W1 W2 H H0 H1 D0 t L l1 delta P
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com
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